Raj K. Mathur
Director, Software Product Management, Aptix Corporation
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Abstract:
In PSPs, SoC or ASIC designs are mapped in multiple FPGAs and used to verify the functionality of the hardware, software and firmware design. This verification method operates at frequencies orders of magnitude above classical simulation. During hardware design debugging, visibility of all the internal registers of the design is necessary to isolate design bugs. Register State Capture technology can be used to achieve this level of visibility. This presentation will briefly highlight the basics of the technology followed by a description of an application that can yield full state design visibility in a performance centric verification environment.
Bio:
Raj Mathur is responsible for software product management including product direction at Aptix Corporation. His focus is software product development with productivity, as well as quality and technical innovations. He holds a Bachelor's degree in Electrical Engineering (1990) and worked as a design engineer at Analog Devices and Stanford Research Systems, before joining Aptix Corporation in 1994.
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